1. Field of the Invention
The present invention relates to a method of saving layout data comprising a plurality of basic element data, each of which directly defines a graphic to be a layout pattern of a component of a semiconductor device and a plurality of cell data constructed by a hierarchical structure which can finally refer to the basic element data.
2. Description of the Background Art
Conventionally, data (layout data) having a layout of a circuit pattern of a large scale integrated circuit (LSI) has been saved in the form conforming to a GDS2STREAM format released from CALMA Co., Ltd. The GDS2STREAM format currently spreads widely in the world and has actually become a standard format. In a general applying method, therefore, data are converted into the GDS2STREAM format and are thus transferred to a software manufactured by other companies if necessary.
In the GDS2STREAM format, first of all, a top cell of the highest order hierarchy to be a starting point is specified and graphic data and another cell to which reference is to be made are specified in the top cell. Graphic data and another cell to which reference is to be made are also specified in a cell to which reference has been made. The reference relationship is recursively repeated until a cell (graphic data) in the lowest layer is reached. Accordingly, all data can be processed sequentially by following the hierarchical structure of the cell from the top cell of the highest hierarchy in order. Thus, the GDS2STREAM format has a feature that a whole file is constituted by describing the hierarchical structure.
FIG. 18 is a diagram showing an example in which layout data are saved according to the conventional art. FIG. 19 is a diagram showing a tree structure of the layout data saved in the format illustrated in FIG. 18.
As shown in these drawings, the data present a hierarchical structure. FIG. 18 shows the following description by three cell data cell1 to cell3.
cell1{cell2, cell2, cell2}
cell2{figD1, figD2, cell3, cell3}
cell3{figD3, figD4, figD5}
It is assumed that figD1 to figD5 are graphic data. The graphic data are also referred to as “basic element data” and actually imply data on one square or one rectangle. For example, an oblong rectangle, a thin vertical rectangle and a small square are piled up so that a transistor can be formed. For respective attributes, the oblong rectangle acts as an active region, the thin vertical rectangle acts as a gate and the small square acts as a contact hole for a source, a gate and a drain. Thus, the basic element data (graphic data) define a graphic to be a layout pattern of a component of a semiconductor device.
In the cell data cell1 of the highest order hierarchy according to the example, reference is made to the lower order cell data cell2 three times. Therefore, the figD1 and figD2 included in the cell2 are used three times. For the cell2, furthermore, reference is made to the lower order cell data cell3 twice. Therefore, the figD3 to figD5 included in the cell3 are used as the cell1 six times. If the data of the cell1 are expanded flatly (into only graphic data), the following flat data can be obtained.
{figD1, figD2, figD3, figD4, figD5, figD3, figD4, figD5, figD1, figD2, figD3, figD4, figD5, figD3, figD4, figD5, figD1, figD2, figD3, figD4, figD5, figD3, figD4, figD5}
Thus, the same graphic data are repetitively described many times. The GDS2STREAM format utilizes the hierarchical structure and therefore has a more compact data structure correspondingly as compared with the example of the flat expansion. This tendency is more remarkable when the same format is used as layout data of an LSI handling large scale data.
Thus, the data format having the hierarchical structure is very efficient because it simply changes the contents of reference of a cell when a work for repetitively using a certain basic graphic or moving and copying a comparatively large data volume is often generated.
In layout data using an ordinary hierarchical structure represented by the GDS2STREAM format, a low order cell and graphic data to which reference is made (which will be hereinafter referred to as a “child cell”) are specified in a cell as described above. To the contrary, however, a high order cell to which reference is made (which will be hereinafter referred to as a “parent cell”) is not specified in the cell. More specifically, cell data from a high order to a low order are specified to implement the hierarchical structure.
In order to check a range in which higher order cells are influenced when an inner part of a certain cell is corrected, therefore, it is necessary to expand and check data by reversely following all the hierarchical structures one by one. For the use in which a mutual positional relationship between graphics included in separate cells is taken into consideration, moreover, it is necessary to once expand a hierarchical structure to form a flat data structure. For this reason, a processing efficiency is reduced as compared with that in flat data originally having no hierarchical structure. The layout data volume of an LSI becomes enormous. Therefore, there is a problem in that a capacity of a storage device such as a disk or a memory is exceeded and a normal processing cannot be carried out when the hierarchical structure is to be expanded to generate flat data.
In order to eliminate such a drawback, it is necessary to have special know-how, for example, to take note of the reference relationship between cells in a layout data design stage or to take care that the cells do not overlap with adjacent cells.